Inductor Layout, and a Voltage-Controlled Oscillator (VCO) System

ABSTRACT

An inductor layout comprising a first inductor and a second inductor. The first and second inductors are electrically and magnetically independent inductors concentrically arranged on an integrated circuit. At least one of the first and second inductors is a multi-loop inductor with a first axis of symmetry.

This application is a continuation of U.S. patent application Ser. No.15/041,108, filed 11 Feb. 2018, which is a continuation of U.S. patentapplication Ser. No. 14/387,462, filed 23 Sep. 2014, which is a NationalStage of International Application No. PCT/EP2013/056883, filed 2 Apr.2013, which claims the benefit of U.S. Provisional Application Ser. No.61/637,323, filed 24 Apr. 2012, and claims the benefit of foreignapplication Serial No. EP 12162984.4, filed 3 Apr. 2012, the disclosuresof each of which are incorporated herein by reference in their entirety.

TECHNICAL FIELD

Embodiments herein relates to an inductor layout, a Voltage-ControlledOscillator (VCO) system, an integrated circuit subsystem, an integratedRadio Frequency (RF) transceiver circuit, a communication device and useof an inductor layout in the integrated circuit. Especially, embodimentsrelate to frequency tuning in the integrated circuit.

BACKGROUND

Future integrated RF transceiver circuits used in cellularcommunications devices will have to handle a constantly increasingnumber of cellular standards and associated frequency bands. Therequirements on the frequency tuning ranges of the Voltage-ControlledOscillators (VCOs) in the Local Oscillator (LO) signal generationsubsystem are getting harder to meet while maintaining acceptableperformance on other critical specification points like phase noise,current consumption, etc.

The trend towards single die solutions, also referred to as “System onChip” solutions, forces the RF building blocks to be implemented in“digital” semiconductor processes with poor prerequisites for providinghigh performance VCO design. This makes it difficult to improve theperformance of current solutions to meet the new demands. By “digital”semiconductor processes is meant semiconductor processes optimized forhigh volume fabrication of large digital circuits at a low cost. Theseprocesses do not support special process features likemetal-insulator-metal (MIM) capacitors, thick metal layers required byhigh-Q inductors, and Metal Oxide Semiconductor (MOS) varicaps thatfacilitate design of high performance analog RF blocks.

A number of new dual-mode VCO designs have been proposed that areaddressing the problem how to increase the tuning range compared to thatof a state-of-the-art single VCO. Unfortunately, these designs allsuffer from degradation of other performance parameters due to theextended tuning range. The use of inductance switching or dual-modetransformer type resonators is associated with degradation of phasenoise performance due to unavoidable introduction of additional lossesin the resonator circuit.

Alternative Phased-Locked Loop (PLL) solutions using Local Oscillator(LO) frequency dividers with other division ratios than multiples of tworeduce the required VCO tuning range but they show a number of unwantedproperties regarding waveform duty cycle, quadrature signal outputavailability, IQ phase accuracy etc.

Using multiple VCOs to cover the required frequency range is astraightforward and flexible solution with the obvious drawback in termsof increased silicon area for those parts of the integrated circuit thatcontain the VCOs. FIG. 1 illustrates the VCO part of a prior artintegrated circuit 100 comprising two separately arranged VCOs 102, 104,each of which VCOs 102,104 comprises a respective inductor 106,108, anda respective capacitor bank 110,112. As illustrated, the use of two VCOsaccording to the prior art will increase the area of the integratedcircuit that is needed as compared to the case when only a single VCO isused. Thus, a disadvantage with the multiple VCOs is the requiredincreased area of the integrated circuit as compared to a single VCOsolution. This is especially a disadvantage since the integratedcircuits tend to be smaller and smaller in order to fit in smaller andsmaller electronic devices. There is also a fabrication cost directlyrelated to the total chip area of the integrated circuit.

Further, the size of the inductor comprised in a VCO or other tunedcircuit is not scaling with the technology development and will in thefuture become a more dominating component on the integrated circuitarea.

SUMMARY

An object of embodiments herein is to improve frequency tuning range inan integrated circuit.

According to a first aspect of embodiments herein, the object isachieved by an inductor layout. The inductor layout comprises a firstinductor and a second inductor. The first and second inductors areindependent inductors concentrically arranged on an integrated circuit.Further, at least one of the first and second inductors is a multi-loopinductor with a first axis of symmetry.

Since the first and second inductors are independent inductorsconcentrically arranged on an integrated circuit, and since at least oneof the first and second inductors is a multi-loop inductor with a firstaxis of symmetry, the tuning range is increased without increasing thearea of the inductor layout. This results in an improved inductor layoutfor frequency tuning in an integrated circuit.

According to a second aspect of embodiments herein, the object isachieved by a VCO system for frequency generation in an integratedcircuit. The VCO system comprises an inductor layout according toembodiments described herein.

According to a third aspect of embodiments herein, the object isachieved by an integrated circuit subsystem for frequency generation.The integrated circuit subsystem comprises a VCO system according toembodiments described herein.

According to a fourth aspect of embodiments herein, the object isachieved by an integrated RF transceiver circuit. The integrated RFtransceiver circuit comprises a VCO system according to embodimentsdescribed herein.

According to a fifth aspect of embodiments herein, the object isachieved by a communication device comprising an integrated RFtransceiver circuit according to embodiments described herein.

According to a sixth aspect of embodiments herein, the object isachieved by using an inductor layout according to embodiments describedherein in an integrated circuit for frequency tuning.

An advantage of embodiments herein is that the improved inductor layoutprovides for an increased tuning range relative to the used area of theinductor layout as compared to prior art inductor layouts.

A further advantage of embodiments herein is that they provide anattractive wide tuning range solution in a situation where two VCOs arechosen to cover the required frequency tuning range.

BRIEF DESCRIPTION OF THE DRAWINGS

Examples of embodiments herein are described in more detail withreference to attached drawings in which:

FIG. 1 is a floor-plan layout illustrating an integrated circuitcomprising inductors having a layout according to prior art;

FIG. 2 schematically illustrates embodiments of an inductor layoutcomprising one 0-shaped and one 8-shaped inductor;

FIG. 3 schematically illustrates embodiments of an inductor layoutcomprising two 8-shaped inductors;

FIGS. 4a,4b schematically illustrate embodiments of an inductor layoutcomprising two clover-leaf shaped inductors;

FIG. 5 schematically illustrates embodiments of an 8-shaped inductor;

FIG. 6 illustrates embodiments of an 8-shaped inductor comprising twomulti-turn inductor loops;

FIG. 7 is a floor-plan layout depicting embodiments of a VCO system; and

FIG. 8 schematically illustrates how the frequency ranges of twoindependent VCOs may be combined into a total tuning range.

DETAILED DESCRIPTION

Embodiments herein will be exemplified in the following non-limitingdescription.

FIGS. 2, 3, and 4 schematically illustrate embodiments of an inductorlayout 200,300,400. Embodiments of the inductor layout 200,300,400provide for an increased frequency tuning range relative the used areaof an integrated circuit (not shown in FIGS. 2-4) as compared to theprior art inductor layouts using the same area size.

The inductor layout 200,300,400 comprises a first inductor 210,310,410and a second inductor 220,320,420. The first and second inductors210,310,410; 220,320,420 are electrically and magnetically independentinductors.

By the expression “electrically and magnetically independent inductor”is meant that the inductors have a very small mutual electro-magneticcoupling coefficient k, normally much less than 0,1. Thus, the first andsecond inductors 210,310,410; 220,320,420 being independent inductorsshow no or low electromagnetic interaction with each other.

Further, the first and second inductors 210,310,410; 220,320,420 areconcentrically arranged on the integrated circuit.

By the expression “concentrically arranged on the integrated circuit” ismeant that the inductors are arranged on the integrated circuit suchthat they share the same centre, e.g. the centre of the first inductor210,310,410 and the centre of the second inductor 220,320,420 is thesame. In other words, the centre of the first inductor 210,310,410 andthe centre of the second inductor 220,320,420 are coinciding. It shouldbe understood that the term “concentrically” when used herein should notbe limited to the case when one of the inductors is smaller than theother and located inside the other, but it should be understood that thetwo inductors may be of the same size and still be concentricallyarranged.

Furthermore, at least one of the first and second inductors 210,310,410;220,320,420 is a multi-loop inductor with a first axis226,316,326,416,426 of symmetry.

FIG. 2 schematically illustrates first embodiments of an inductor layout200. As schematically illustrated, the inductor layout 200 comprises afirst inductor 210. The first inductor 210 has a single inductor coil212 which is o-shaped with a single loop 212 a. Further, the firstinductor 210 comprises first and second inductor terminals 214 a,214 b,and first and second axes 216 a,216 b of symmetry. The intersectionpoint of the first and second axes 216 a,216 b of symmetry defines thecentre of the first inductor 210.

The inductor layout 200 comprises further a second inductor 220. Thesecond inductor 220 is a multi-loop inductor comprising an inductor coil222. The inductor coil 220 is in the shape of a FIG. 8 with a firstinductor loop 222 a and a second inductor loop 222 b. Further, thesecond inductor 220 comprises first and second inductor terminals 224 a,224 b, and first and second axes 226 a,226 b of symmetry. Theintersection point of the first and second axes 226 a,226 b of symmetrydefines the centre of the second inductor 220.

FIG. 3 schematically illustrates second embodiments of an inductorlayout 300. As schematically illustrated, the inductor layout 300comprises a first inductor 310. The first inductor 310 is a multi-loopinductor and comprises an inductor coil 312. The inductor coil 312 is inthe shape of a FIG. 8 and has first inductor loop 312 a and a secondinductor loop 312 b. Further, the first inductor 310 comprises first andsecond inductor terminals 314 a,314 b, and first and second axes 316a,316 b of symmetry. The intersection point of the first and second axes316 a,316 b of symmetry defines the centre of the first inductor 310.

Further, the inductor layout 300 comprises a second inductor 320. Thesecond inductor 320 is a multi-loop inductor and comprises an inductorcoil 322. The inductor coil 322 is in the shape of FIG. 8 and has afirst inductor loop 322 a and a second inductor loop 322 b. Further, thesecond inductor 320 comprises first and second inductor terminals 324 a,324 b, and first and second axes 326 a,326 b of symmetry. Theintersection point of the first and second axes 326 a,326 b of symmetrydefines the centre of the second inductor 320.

FIGS. 4a and 4b schematically illustrate third embodiments of aninductor layout 400. As schematically illustrated in FIG. 4a , theinductor layout 400 comprises a first inductor 410. The first inductor410 is a multi-loop inductor and has an inductor coil 412. The inductorcoil 412 is in the shape of a four-leaf clover and has a first inductorloop 412 a, a second inductor loop 412 b, a third inductor loop 412 c,and a fourth inductor loop 412 d. Further, the first inductor 410comprises first and second inductor terminals 414 a, 414 b, and firstand second axes 416 a,416 b of symmetry. The intersection point of thefirst and second axes 416 a,416 b of symmetry defines the centre of thefirst inductor 410.

The inductor layout 400 comprises further a second inductor 420. Thesecond inductor 420 is a multi-loop inductor and has an inductor coil422. The inductor coil 422 is in the shape of four-leaf clover and has afirst inductor loop 422 a, a second inductor loop 422 b, a thirdinductor loop 422 c, and a fourth inductor loop 422 d. Further, thesecond inductor 420 comprises first and second inductor terminals 424 a,424 b, and first and second axes 426 a,426 b of symmetry. Theintersection point of the first and second axes 426 a,426 b of symmetrydefines the centre of the second inductor 420.

For clarity reason, the four-leaf clover-shaped first and secondinductors 410,420 are shown separated from each other in FIG. 4a , butit should be understood that the first and second four-leafclover-shaped inductors 410,420 are arranged concentrically on theintegrated circuit as schematically illustrated in FIG. 4 b.

In some embodiments, the multi-loop inductor comprises an even number ofinductor loops 222,312,322,412,422 arranged in a plane of the multi-loopinductor such that magnetic fields emanating from the loops of the firstinductor and picked up by the loops of the second inductor cancel eachother.

It should be understood that in some embodiments, the crossover betweentwo inductor loops in the same multi-loop inductor may be arranged in ametal layer of the integrated circuit that is different from the metallayer where the loops are arranged, but such embodiments will still bereferred to as having the inductor loops arranged in the plane of themulti-loop inductor. Further, in some embodiments, the crossoverscomprised in different multi-loop inductors are arranged non-overlappingin order to minimize the number of metal layers needed for theimplementation.

As previously mentioned, at least one of the first and second inductors210,310, 410; 220,320,420 is a multi-loop inductor with a first axis 226a,316 a,326 a,416 a,426 a of symmetry. Further, the other one of the atleast one of the first and second inductors 310,410; 220,320,420 mayalso be a multi-loop inductor having a first axis 226 a,316 a,326 a,416a,426 a of symmetry. In other words, both the first and second inductors310,410; 220,320,420 may be multi-loop inductors.

Further, the first and second inductors 310,410; 220,320,420 may bearranged rotated relative to each other in order to minimize theelectro-magnetic coupling between them. Electro-magnetic coupling occursbetween two conductors when they are configured such that a change incurrent flow through one wire induces a voltage across the ends of theother wire through electromagnetic induction.

In some embodiments, it is important for minimization of the mutualelectro-magnetic coupling between the first and second inductors310,410; 220,320,420 that the symmetry, position, and relative rotationof the first and second inductors 310,410; 220,320,420 are chosen in anoptimal manner. Consequently, in order to minimize the electro-magneticcoupling between the first and second inductors 310,410; 220,320,420,the first and second inductors 310,410; 220,320,420 should be arrangedsuch that a change in current in one of the inductors does not or atleast to a minimal extent induce a voltage across the ends of the otherinductor. Thus, whether or not the first and second inductors 310,410;220,320,420 are to be arranged rotated relative to each other, and if tobe rotated, the degree of rotation, depends on the shape of theinductors. The angle of rotation depends on the number of loops of theinductor 310,410; 220,320,420 comprising the least number of loops. Ifthis number is denoted N, the angle of rotation for minimumelectro-magnetic coupling may be calculated as 180/N degrees for Nvalues equal to or larger than 2. If N equals 1, no rotation is requiredbut a certain angle that simplifies the inductor layout of theintegrated circuit may be chosen.

As schematically illustrated in FIG. 3, the first and second inductors310,320 are substantially figure 8-shaped. Each of the first and secondinductors 310,320 comprises two inductor loops 312 a,312 b; 322 a,322 b.Further, the first and second inductors 310,320 may be arranged rotatedrelative to each other such that an angle between the first axis 316 aof symmetry of the first inductor 310 and the first axis 326 a ofsymmetry of the second inductor 320 is 90 degrees (N=2 yields rotationangle=180/2=90 degrees). A deviation from the optimal angle of rotationwill increase the electro-magnetic coupling between the two inductors310,410; 220,320,420, but the isolation may still be high enough for theintended application. In some embodiments, the angle may be in theinterval between 85 and 95 degrees without substantial degradation ofthe performance.

By arranging the figured 8-shaped first and second inductors 310,320rotated about 90 degrees relative each other, the electro-magneticcoupling between them is as small as possible, i.e. the electro-magneticcoupling between them is minimized, or at least substantially minimized.Further, the electro-magnetic coupling may also be minimized usingclever inductor layout. By clever inductor layout is meant that theoverlap area where the inductor wires are crossing is kept to a minimumand that the vertical and horizontal distance between the two inductors310,320 should be maximized. These two layout factors dominating themutual capacitance may be influenced by clever choice of wire width andmetal layer.

FIG. 5 schematically illustrates an embodiment of a figure 8-shapedinductor 500. The inductor 500 has an inductor coil 502 and terminals504 a and 504 b. It has been designed so that it is substantiallysymmetrical about a first axis 508 of symmetry. In the present example,the inductor coil 502 is in the form of a single-turn 8-shaped structurewith an upper loop 506 a and a lower loop 506 b. By virtue of thefigure-8 shape, current in the upper loop 506 a travels in a direction(e.g., counterclockwise, see arrows) that is opposite to current in thelower loop 506 b (e.g., clockwise). As a result, the Electromagnetic(EM) field components emanating at a certain distance from the twosubstantially symmetrical loops 506 a and 506 b also have oppositedirections and tend to counteract each other. The directions of the EMfield components are indicated by conventional notation in the middle ofeach loop 506 a and 506 b. Consequently, the inductor 500 has been foundto have a significantly reduced far field at a certain distance from theinductor coil 502. Thus, by making the two loops 506 a and 506 bsubstantially symmetrical, cancellation of a significant amount of farfield on either side of a second central symmetry axis 510 is achieved.It should be noted, however, that perfect symmetry between the two loops506 a and 506 b may be difficult to achieve given the presence of theterminals 504 a and 504 b.

The mutual electro-magnetic coupling between two concentrically arrangedinductors 310,320 is determined by the near field properties of the8-shaped inductor 310,320. Desired isolation may only be achieved whenthe two inductors 310,320 are combined in a proper manner.

The symmetry of the inductor 500 with respect to the first axis 508 ofsymmetry is important for minimizing the generation of common-modesignal components.

Other considerations may include basic layout parameters, such as thewidth and height of the inductor coil 502 together with the width andspacing of the surrounding metal wires. These parameters, however, aremainly determined by requirements on inductance, Q-factor, chip area,and process layout rules and have only minor influence on mutualelectro-magnetic coupling characteristics as long as symmetry of theinductor coil is maintained.

As previously mentioned, the first and second inductors 410,420 may besubstantially four-leaf clover-shaped. Each of the first and secondinductors 410,420 comprises four inductor loops 412 a,412 b,412 c,412 d;422 a,422 b,422 c,422 d. Further, the first and second inductors 410,420may be arranged rotated relative to each other such that they have anelectro-magnetic coupling coefficient k that is minimized, or at leastsubstantially minimized. Thereby, an angle α between the first axis 416a of symmetry of the first inductor 410 and the first axis 426 a ofsymmetry of the second inductor 420 is in the interval between 40 and 50degrees. In some embodiments, the angle α is in the interval between 43and 47 degrees. More specifically the angle α may be substantially 45degrees.

By arranging the four-leaf clover-shaped first and second inductors410,420 rotated about 45 degrees relative each other, theelectro-magnetic coupling between them is as small as possible, i.e. theelectro-magnetic coupling between them is minimized.

In the FIGS. 2-4 only two inductors have been shown, but it should beunderstood that embodiments of the inductor layout 200,300,400 maycomprise more than two inductors. Thus, a number of one or more of theinductors 210,220,310,320, 410,420 exemplified herein may be combined toform the inductor layout 200,300,400 as long as the plurality ofinductors are concentrically arranged on the integrated circuit and aslong as all inductors 210,220,310,320, 410,420 except one is amulti-loop inductor with a first axis 226 a,316 a,326 a,416 a,426 a ofsymmetry.

For example, at least a third independent inductor210,220,310,320,410,420 may be concentrically arranged with the firstand second independent inductors 210,220, 310,320,410,420 on theintegrated circuit. The possible combinations of inductor types androtations are given by the requirement that each inductor should have aminimum of interaction with both of the other inductors.

Embodiments of the inductor layout 200,300,400 result in a very smallmutual electro-magnetic coupling between the inductor coils in spite ofthe fact that they are positioned in the same area of the integratedcircuit. With the expression “very small mutual electro-magneticcoupling” is meant very low mutual inductance and parasitic capacitancebetween the inductors comprised in the inductor layout 200,300,400. Asmall amount of capacitive coupling may not be avoided, but it has onlya minor impact on inductance and Q-value.

Further, in the FIGS. 2-4 only inductors 210,220,310,320, 410,420comprising single-turn loops have been shown, but it should beunderstood that one or more of the inductors 210,220,310,320, 410,420comprised in the inductor layout 200,300,400 may be a multi-turninductor comprising at least one multi-turn inductor loop.

FIG. 6 schematically illustrates an inductor 610 comprising an inductorcoil 612. The inductor coil 612 is in the shape of a FIG. 8 and has twodouble-turn inductor loops 612 a,612 b. However, even if the inductor610 shown in FIG. 6 is figure 8-shaped, it should be understood that theinductor 610 may be o-shaped or four-leaf clover-shaped. Further, itshould also be understood that the number of turns may be more than two.

In some embodiments, during operation of the inductor layout 200,300,400only one of the inductors 210,220,310,320,410,420 is configured to beactivated at each point in time. By configuring the inductors210,220,310,320,410,420 to be activated one at a time, the inductors210,220,310,320,410,420 may be concentrically arranged on the integratedcircuit without negatively affecting the operation of each other.

Further, one of the first and second inductors 210,220,310,320,410,420may have a size that is smaller than the size of the other one of thefirst and second inductors 210,220,310,320,410,420. By configuring theinductors to have different sizes, different oscillation frequencies maybe obtained when used in a VCO system, which will be described below.

Embodiments herein do also relate to a VCO system for frequencygeneration. The VCO system comprises the inductor layout 200,300,400frequency tuning in an integrated circuit. FIG. 7 schematicallyillustrates a VCO system 700 comprising a first VCO 710 that comprisesthe first inductor 210,310,410, and a second VCO 720 that comprises thesecond inductor 220,320,420. Further, as previously described, one ofthe first and second inductors 210,310,410; 220,320,420 may have a sizethat is smaller than the size of the other one of the first and secondinductors 210,310,410,220,320,420, whereby the interaction between themis reduced and the oscillation frequency of the VCO 710,720 comprisingthe smallest inductor 210,310,410, is higher than the oscillationfrequency of the VCO 710,720 comprising the largest inductor220,320,420. Thus, the combined tuning of the two VCOs' frequency rangemay be extended significantly as compared to the frequency range of onesingle VCO.

As schematically illustrated in FIG. 7, the first and second inductors310,320 are figure 8-shaped, but it should be understood that the VCOsystem 700 may comprise any one of the previously described embodimentsof the inductor layout 200,300,400.

The electro-magnetic properties of embodiments of the inductor layouts200,300,400 described above and comprising symmetrical inductors210,310,410, 220,320,420, allow the inductors 210,310,410, 220,320,420of two different VCOs 710,720 to be put on top of each other in the samearea of the integrated circuit as long as both VCOs are not activated atthe same time.

Further, the first and second VCOs 710,720 may be configured to comprisea respective capacitor bank 712,722. The first and second VCOs 710,720may also be configured to share bias and control blocks 714,724, whichbias and control blocks 714,724 comprise one or more of a supply voltageregulator, a decoupling mechanism, a buffer to operate the capacitorbanks 712,722, control logic for digital frequency tuning and/or biascurrent settings. The share bias and control blocks 714,724 may becomprised in one of the first and second VCOs 710,720. However, asschematically illustrated in FIG. 7, the share bias and control blocks714,724 may be arranged external of the first and second VCOs 710,720.

By the sharing of components, the size of the VCO system 700 is reducedas compared to a VCO system comprising no sharing of components.Consequently, a VCO system 700 comprising sharing of components occupiesless area on an integrated circuit than a VCO system not comprisingsharing of components.

Further, the first VCO 710 and the second VCO 720 may be individuallyoptimized in terms of tuning range, phase noise, and current consumptionfor their individual operating ranges. The trade-off between thesecorrelated performance parameters may be different for the two VCOswhich make it easier to meet the varying specification requirements indifferent parts of the total combined frequency range. Therefore, a VCOsystem 700 comprising two VCOs 710,720 provides better performance thana corresponding a single prior art multi-mode VCO implementation. Thearea of the integrated circuit may be reduced if the two inductor coilsshare the same inductor area on the integrated circuit. This is possiblewith the inductor layout 200,300,400 previously described since theinductor layout 200,300,400 minimizes the mutual electro-magneticcoupling between the inductors to level where it is no longer a problem.

The proposed embodiments of the inductor layout 200,300,400 make itpossible to implement the dual VCO concept with all its advantages witha minimum penalty of increased area of the integrated circuit.

Embodiments herein do also relate to an integrated circuit 800 forfrequency tuning. Embodiments of the integrated circuit 800 areschematically illustrated in FIG. 7. As illustrated, the integratedcircuit 800 comprises a VCO system 700. In some embodiments, theintegrated circuit 800 is an integrated RF transceiver circuit.

Further, embodiments herein do also relate to an integrated circuitsub-system 801 comprising the VCO system 700.

Embodiments herein do also relate to a communication device comprisingthe integrated circuit 800. In some embodiments, the communicationdevice comprises the integrated RF transceiver circuit. Thecommunication device may comprise e.g. a base station, a network node, arelay station, a user equipment or any other device configured forcommunication.

Further, embodiments herein relate to the use of an inductor layout200,300,400 in the integrated circuit 800 for frequency tuning.

FIG. 8 illustrates exemplifying frequency ranges for a dual VCO system700. As illustrated, a total frequency range may be in an intervalbetween 2.7 GHz and 6.0 GHz for a digital frequency tuning control wordranging from 0 to 31. Thus, by splitting the required total tuning rangeinto two sub-ranges; 2.7-4.7 GHz for the larger VCO 720, and 3.7-6 GHzfor the smaller VCO 710, it is possible to reduce the tuning range ofeach of the respective first and second VCO 710,720.

A smaller tuning range of the respective first and second VCO 710,720makes it possible to meet the phase noise specification using lesssupply current to the respective VCO 710,720. This is an advantage sincethe use of less supply current is an important design goal.

The performance of the respective first and second VCO 710,720 may beoptimized separately to meet e.g. the different phase noisespecifications and other specifications in different parts of the totalstuning range. Therefore, the dual VCO system 700 provides moreflexibility which results in a more optimal solution in many aspects.

Although the description above contains many specifics, they should notbe construed as limiting but as merely providing illustrations of somepresently preferred embodiments. The technology fully encompasses otherembodiments which may become apparent to those skilled in the art.Reference to an element in the singular is not intended to mean “one andonly one” unless explicitly so stated, but rather “one or more.” Allstructural and functional equivalents to the elements of theabove-described embodiments that are known to those of ordinary skill inthe art are expressly incorporated herein by reference and are intendedto be encompassed hereby. Moreover, it is not necessary for a device ormethod to address each and every problem sought to be solved by thedescribed technology for it to be encompassed hereby.

When using the word “comprise” or “comprising” it shall be interpretedas non-limiting, i.e. meaning “consist at least of”.

When using the word “action”/“actions” it shall be interpreted broadlyand not to imply that the actions have to be carried out in the ordermentioned. Instead, the actions may be carried out in any suitable orderother than the order mentioned. Further, some action/actions may beoptional.

The embodiments herein are not limited to the above described preferredembodiments. Various alternatives, modifications and equivalents may beused. Therefore, the above embodiments should not be taken as limitingthe scope of the invention, which is defined by the appending claims.

What is claimed is:
 1. An inductor layout comprising: a first inductor;and a second inductor; wherein the first and second inductors compriseelectrically and magnetically independent inductors; wherein the firstand second inductors are concentrically arranged on an integratedcircuit; and wherein at least one of the first and second inductorscomprises a first multi-loop inductor with a first axis of symmetry. 2.The inductor layout of claim 1, wherein the first inductor and thesecond inductor comprise electrically and magnetically independentinductors having an electro-magnetic coupling coefficient k less than0.1.
 3. The inductor layout of claim 1, wherein the multi-loop inductorcomprises an even number of inductor loops arranged in a plane of themulti-loop inductor such that magnetic fields emanating from theinductor loops substantially cancel each other.
 4. The inductor layoutof claim 3, wherein the other one of the at least one of the first andsecond inductors comprises a second multi-loop inductor having a secondaxis of symmetry, and wherein the first and second inductors are rotatedrelative to each other such that they have an electro-magnetic couplingcoefficient k that is substantially minimized.
 5. The inductor layout ofclaim 4, wherein: each of the first and second inductors comprises twoinductor loops; each of the first and second inductors is substantiallyfigure 8-shaped; and the first and second inductors are rotated relativeto each other such that an angle between the first axis of symmetry ofthe first inductor and the second axis of symmetry of the secondinductor is about 90 degrees.
 6. The inductor layout of claim 4,wherein: each of the first and second inductors comprises four inductorloops; each of the first and second inductors is substantially four-leafclover-shaped; and the first and second inductors are rotated relativeto each other such that an angle between the first axis of symmetry ofthe first inductor and the second axis of symmetry of the secondinductor is about 45 degrees.
 7. The inductor layout of claim 1, furthercomprising at least a third inductor concentrically arranged with thefirst and second inductors on the integrated circuit, said thirdinductor comprising an independent inductor.
 8. The inductor layout ofclaim 7, wherein at least one of the first inductor, the secondinductor, and the at least third inductor comprises a multi-turninductor comprising at least one multi-turn inductor loop.
 9. Theinductor layout of claim 1, wherein only one of the inductors isconfigured to be activated at each point in time.
 10. The inductorlayout of claim 1, wherein the first and second inductors are not thesame size.
 11. A Voltage-Controlled Oscillator (VCO) system forfrequency generation in an integrated circuit, the VCO systemcomprising: an inductor layout comprising: first inductor; and a secondinductor; wherein the first and second inductors comprise electricallyand magnetically independent inductors; wherein the first and secondinductors are concentrically arranged on an integrated circuit; andwherein at least one of the first and second inductors comprises amulti-loop inductor with a first axis of symmetry.
 12. The VCO system ofclaim 11, wherein the first inductor and the second inductor compriseelectrically and magnetically independent inductors having anelectro-magnetic coupling coefficient k less than 0.1.
 13. The VCOsystem of claim 11, wherein the multi-loop inductor comprises an evennumber of inductor loops arranged in a plane of the multi-loop inductorsuch that magnetic fields emanating from the inductor loopssubstantially cancel each other.
 14. The VCO system of claim 11, furthercomprising at least a third inductor concentrically arranged with thefirst and second inductors on the integrated circuit, said thirdinductor comprising an independent inductor.
 15. The VCO system of claim11, wherein: a first VCO comprises the first inductor; a second VCOcomprises the second inductor; and a size of one of the first and secondinductors is smaller than a size of the other one of the first andsecond inductors, whereby the oscillation frequency of the VCOcomprising the smaller inductor is higher than the oscillation frequencyof the VCO comprising the larger inductor.
 16. The VCO system of claim15, wherein the first and second VCOs comprise respective capacitorbanks, and wherein the first and second VCOs are configured to sharebias and control blocks.
 17. An integrated RF transceiver circuitcomprising: a Voltage-Controlled Oscillator (VCO) system for frequencygeneration in an integrated circuit, the VCO system comprising: aninductor layout comprising first inductor; and a second inductor;wherein the first and second inductors comprise electrically andmagnetically independent inductors; wherein the first and secondinductors are concentrically arranged on an integrated circuit; andwherein at least one of the first and second inductors comprises amulti-loop inductor with a first axis of symmetry.
 18. An integratedcircuit comprising a Voltage-Controlled Oscillator (VCO) system forfrequency generation in an integrated circuit, the VCO systemcomprising: an inductor layout comprising first inductor; and a secondinductor; and control logic operatively coupled to the VCO system andconfigured to implement frequency tuning in the integrated circuit;wherein the first and second inductors comprise electrically andmagnetically independent inductors; wherein the first and secondinductors are concentrically arranged on an integrated circuit; andwherein at least one of the first and second inductors comprises amulti-loop inductor with a first axis of symmetry.